This invention relates to deflection control in CRT (cathode ray tube) displays and, more paricularly, to a locked loop control based on a comparison of a yoke current signal directly with a horizontal synchronization signal.
CRT displays, such as those employed in television, present pictures which are developed by a raster scan wherein a frame of the raster comprises a set of horizontal lines. Successive sets of horizontal lines are separated by a vertical retrace. In order to insure that lines are generated at the desired instants of time in each frame, thereby to place the lines in registration with each other for good picture quality, some form of synchronization is employed.
In the typical construction of a CRT, the tube is provided with deflection coils, sometimes referred to as a yoke, which are driven by currents to deflect the beam to a desired point on the face of the display. One of these coils, the horizontal deflection coil, deflects the beam in the horizontal direction for generating each line. A second of these coils, the vertical deflection coil, adjusts the height of the beam during the scanning of each line.
Of particular interest is the operation of the horizontal deflection coil. During the scanning of each line, an electric current having a waveform in the form of a ramp is applied to the coil. The initiation of each ramp is individually controlled by synchronizing the ramp with a signal referred to as the horizontal sync. In the cases of television and other forms of CRT displays, the sync for each line is transmitted along with the data to be displayed. However, the horizontal sync is not provided between frames during vertical retrace intervals. As a result, synchronization circuitry may fall partially out of lock during a retrace interval unless the circuitry is specifically designed to continue operating during the retrace interval.
A suitable synchronization circuit, extensively employed in display technology, comprises a phase-locked loop. Such a synchronization circuit is capable of operating during the retrace interval without loss of synchronization because the phase-locked loop includes a VCO (Voltage controlled oscillator) which runs continuously. Thereby, the loop maintains proper phase, except for a negligibly small drift, in the absence of the horizontal sync during the retrace interval.
A problem arises in that a phase-locked loop, in combination with a loop filter which controls the dynamic response of the loop, and in combination further with coil driver circuitry which is placed within the loop, has a transfer function which is substantially more complex than the simple integrator which characterizes the VCO. As a result, such loops have a tendency toward instability, and may experience jitter due to noise, which effects may reduce the precision of presentation of data on the display.
It is noted that a display need not be constructed as a television, wherein the number of sync pulses is restricted by the transmitted signal format and bandwidth. In the case of a computer driven display, horizontal sync pulses can be generated continuously, even during the retrace interval in which case there is no need for the synchronization circuit to provide its own phase reference, as by use of the foregoing VCO. Thus, it is seen that presently available synchronization circuitry provides a capacity that may not be required and at the expense of possible instability and excessive sensitivity to noise.